1. Field of the Invention
The present invention relates to a die bonding apparatus for die bonding, for example, a semiconductor chip to a substrate.
2. Description of the Related Art
In various electronic apparatuses, chips which are semiconductor devices are mounted as component parts. During the operation of a chip, the chip generates heat by being energized, and its temperature rises; however, there is a problem in that if the temperature of the chip rises excessively, its operation becomes unstable. To solve this problem, the chip is soldered, i.e., die bonded, to a substrate which also serves as a heat sink. The chip is die bonded to the substrate whereby the heat generated during the operation of the chip is radiated through the substrate. Therefore, the excessive temperature rise of the chip is suppressed, thereby maintaining the stable operation of the chip.
FIG. 11 is a cross-sectional view illustrating in a simplified form the state in which a chip 1 is die bonded to a substrate 2. The die bonding of the chip 1 with respect to the substrate 2 is generally effected as follows: Foil-like solder 3 is supplied to the surface of the substrate 2 to be die bonded, and the chip 1 is disposed on the side of the solder 3 which is opposite to a side of the solder 3 facing the substrate 2, such that the surface of the chip 1 to be die bonded is in contact with the solder 3. Namely, the chip 1, the solder 3, and the substrate 2 are arranged in that order such that the solder 3 is interposed between the chip 1 and the substrate 2. The chip 1 and the substrate 2 with the solder 3 interposed therebetween are loaded in, for example, a heat treatment furnace, and are heated to a temperature above the melting point of the solder 3. After the solder 3 melts and is filled in the gap between the chip 1 and the substrate 2, the chip 1, the substrate 2, and the solder 3 are cooled down to room temperature, thereby completing die bonding.
There are cases where bubbles 4 are produced in the solder 3 bonding the chip 1 and the substrate 2 owing to the entrainment of air or an atmospheric gas which is present in the heat treatment furnace or by an organic gas evaporating from the chip and the substrate which are die bonded. Since the portions of the bubbles 4 formed in the solder 3 are cavities, the thermal conductivity is extremely low in these portions as compared with the solder 4. The plurality of zigzag lines 5 in FIG. 11 schematically show the state in which the heat generated in the chip 1 during operation passes through the solder 3 and the substrate 2 and is radiated. The heat generated in the chip 1 is conducted toward the substrate 2, as indicated by the zigzag lines 5, but the heat is substantially not conducted at the portions of the bubbles 4 where the thermal conductivity is low. Accordingly, as for the heat generated in the chip 1, if the bubble 4 are present in the solder 3, the thermal conductivity declines appreciably at the portions of the bubbles 4, so that smooth heat conduction to the substrate 2 is hampered, and the temperature of the chip 1 rises undesirably.
In addition, if the bubbles 4 are present in the solder 3, the area of bonding between the chip 1 and the substrate 2 decreases, so that the bonding surface is subjected to thermal stresses occurring due to the repetition of the temperature rise and cooling during the operation and non-operation of the chip 1, thereby promoting the deterioration of the bonding surface. For this reason, it is necessary to suppress the occurrence of the bubbles 4 in the solder 3 at the time of die bonding the chip 1 and the substrate 2.
In the related art for suppressing the occurrence of bubbles in the solder at the time of die bonding, for instance, there is a method for controlling the temperature profile of the heat treatment furnace for melting and solidifying the solder. By controlling the temperature profile of the heat treatment furnace, a gas which causes the formation of bubbles is sufficiently removed from the solder during the melting and solidification of the solder, thereby suppressing the formation of the bubbles. However, with the method for controlling the temperature profile, there are problems in that it is impossible to obtain a noticeable effect in suppressing the occurrence of bubbles, that the temperature profile changes depending on the types of chips and substrates, and that time is required until the completion of die bonding, resulting in a decline in the efficiency.
In addition, as another example in the related art for suppressing the occurrence of bubbles, JP-A-5-283449, for example, discloses a technique wherein solder is remelted, and bubbles in the solder are removed by imparting ultrasonic vibrations to the solder at the time of remelting. In this related art, however, since the solder subjected once to die bonded is remelted, there is a problem in that the number of processes increases, resulting in a decline in the production efficiency. In addition, since a device for imparting ultrasonic vibrations is required, there is a problem in that the apparatus becomes large in size and complex.
Furthermore, as other examples of the related art for suppressing the occurrence of bubbles, JP-A-63-76461 and JP-A-2-161736, for example, disclose techniques wherein grooves or holes are formed in the substrate, and a gas which causes the occurrence of bubbles is allowed to escape through the grooves or holes formed in the substrate, so as to suppress the occurrence of the bubbles. In these examples of the related art, however, since the grooves or holes are formed in the substrate, there is a problem in that the strength of the substrate declines. In addition, since the substrate must be formed in advance, there is a problem in that the number of working processes increases, resulting in a decline in the production efficiency.